그것을 알아보자 - ARM Cortex-M33

ARM Cortex-M33

Cortex-M33 프로세서는 보안과 디지털 신호 제어(DSP)가 필요한 IoT, 임베디드 애플리케이션에 있어,

효율적인 대안이 되어줄 최신 프로세서가 되겠습니다.

Cortex-M23과 마찬가지로 ARMv8-M아키텍처로 접어들면서 ARM에서 개발한 보안기술인

TrustZone 기술이 적용되면서 대부분의 소프트웨어를  안전하게 격리하여 보안할 수 있다고 합니다.

Specifications

Architecture : ARMv8-M Mainline extension

Bus Interface : 2x AMBA5 AHB interface (Harvard bus architecture)

ISA Support : Thumb/Thumb-2 subset

Pipeline : 3-stages

Software Security : Optional TrustZone for ARMv8-M, with optional Security

DSP Extension :

- Single cycle 16/32-bit MAC

- Single cycle dual 16-bit MAC

- 8/16-bit SIMD arithmetic

Floating-Point Unit : Optional single precision floating point unit IEEE 754 compliant

Co-processor interface : Optional dedicated co-processor bus interface

for up to 8 co-processor units for custom compute

Memory Protection : Optional MPU with up to 8 regions per security state

Interrupts : Non-maskable Interrupt (NMI) and 1 to 480 physical interrupts

Interrupt Priority Levels : 8 to 256 priority levels

Wakeup Interrupt Controller : Optional for waking up the processor

from state retention power gating or when all clocks are stopped

Sleep Modes :

- Integrated WFI and WFE Instructions and Sleep On Exit functionality

Debug : Optional JTAG and Serial Wire Debug ports, Up to 8 Breakpoints and 4 Watchpoints

Trace : Optional Instruction (ETM), Micro Trace Buffer (MTB),

Data Trace (DWT), and Instrumentation Trace (ITM)

DMIPS/MHz range : 1.5

CoreMark®/MHz : 4.02

MPU(Memory Protection Unit) : Yes (option) (2x)

Maximum MPU Regions : 16

Trace (ETM or MTB) : ETMv4 (option) or MTB (option)

DSP(Digital Signal Processing) : Yes (option)

Floating Point Hardware : Yes (option SP)

Systick Timer : Yes (2x)

Built-in Caches : No

Tightly Coupled Memory : No

TrustZone for ARMv8-M : Yes (option)

Bus Protocol : AHB5, APB

Single Cycle Multiply : Yes

CMSIS Support : Yes

Dual Core Lock-Step Support : Yes